Recently, manufacturers have started using PCB (Printed Circuit Board) to replace lead frames in semi-conductor packages to reduce inductance, improve electrical performance, improve heat-emission performance and improve surface-mounting performance for the semiconductor package.
When the PCB used in the semiconductor package includes a thermosetting resin layer, which is a base layer, a plurality of copper wiring patterns are formed on upper and lower surfaces of the base layer, and a solder mask coating is formed on the copper wiring patterns.
In order to form the semiconductor package by mounting a die on the PCB, a solder ball is welded between the copper wiring patterns of the PCB and a bonding pad of the die such that the copper wiring patterns are electrically connected to the bonding pad of the die. For instance, a wafer level package and a flip-chip assembly package may be fabricated through the above semiconductor fabrication method using a solder ball. To form a wafer level package, a solder ball is mounted on a pattern of a die. In addition, for the flip-chip assembly package, a die is mounted on a PCB after a solder ball has been mounted on the die, and the die is molded by an encapsulant, thereby forming the flip-chip assembly package. When packaging the die, it is necessary to obtain a high Input/Output (I/O) count for a given package size.
However, in order to allow the die to withstand external stress applied to the die during the packaging process, it is necessary to use a solder ball having a proper size. Consequently, there is a physical limitation for increasing the I/O count. That is, a smaller number of bond pads may have to be formed even if the die has a sufficient area for more.